The Senior FPGA Verification Engineer will be responsible for high reliably real-time FPGA verification activities.
Responsibilities Include:
High reliably FPGA logic design verification
High performance pipeline architectures verification
Verification of soft cores IP integration
Run unit verification tests for complex blocks
Run Top level verification tests (for all FPGA)
Support lab ramp up and tests
Run Code Coverage and Functional Coverage
Using Assertion-Based Verification
Run Direct, Random and stress tests
Lead and define Complex FPGA verification methodologies and tools
Development in conformance to safety and cybersecurity standard משרה 103092
* Bachelors’ degree in Electrical Engineering, Software Engineering or Computer Science – A must
* Experience with VHDL/Verilog and SystemVerilog – A must
* Hands-on experience with * ASIC/FPGA verifications– A must
* Hands-on experience with synchronous and high-performance pipeline architecture – A must
* Experience with block-level verification and debugging – A must
* Experience with Top-level verification and debugging – A must
* Experience with code coverage writing and results analysis – A must
* Experience with functional coverage writing and results analysis – A must
* Experience with assertions writing and results analysis – A must
*Experience with both RTL and * Gate level simulations – A must
* Experience with IP integration (ARM, AXI bus, Ethernet MAC etc.) – preferred
* Familiarity with Xilinx/ALTERA/Lattice FPGA architecture – preferred
* Experience with safety-critical systems – preferred
Experience with automotive systems – preferred
* Experience in writing Python, TCL scripts - advantage
Build automatic test environments - advantage
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